This talks about two major performance concerns in CPUs: control flow and memory access. The transition between the two was my favorite part of the article. It's both funny and accurate.
"If the previous section gave the impression that, say, control flow is a particularly tough problem, but inventive methods can give powerful and practical tools to tackle it… good, that was the intent. In this section I want you to take that expectation and dash it against the rocks — memory is hard."
This is also the idea behind the Pixel Planes rendering architecture from the 80's, they called it "logic-enhanced memory chips". It's not a "universal CPU" on the memory chips, but each chip can "process" and store 128 pixels, where the processing is implemented with a hardwired linear expression.
"If the previous section gave the impression that, say, control flow is a particularly tough problem, but inventive methods can give powerful and practical tools to tackle it… good, that was the intent. In this section I want you to take that expectation and dash it against the rocks — memory is hard."