It's quite possible AMD has plans for this type of thing as well: despite their cores being more energy efficient and powerful per watt than Intel, I don't think they can match Apple yet (some of that is due to 5 nm process though).
A lot of Apple’s advantage here comes from the regular instruction size, the relaxed memory semantics, and how those allow efficient instruction reordering.
Not saying x86 can’t ever replicate that, but the ISA makes it harder.
They have a patent for something similar at least: https://wccftech.com/amd-big-little-processor-cores-show-up-...